About - Faradaem

What Faradaem is

Faradaem is an AI-assisted analog IC design tool. You give it a specification: gain, bandwidth, phase margin, power budget. It returns a verified transistor-level design.

Verified means the numbers were measured, not asserted. Every value Faradaem reports about a circuit was produced by simulating that circuit.

How it works

The work is split three ways so each part does only what it is good at.

ngspice is the sole source of numerical truth. Every operating point, gain and margin comes out of a real simulator run. Nothing else in the system is permitted to produce a circuit value.

A numerical optimizer does the search through component and bias space. It is the part that actually finds sizings that meet a spec, because that is a numerical problem and numerical methods solve it well.

An LLM handles strategy only: choosing a topology, framing trade-offs, deciding what to try next, and explaining the result. It never computes a circuit value. When you see a voltage on this site, a simulator measured it.

The studies

Analog design runs on folklore: which topology can reach which spec, whether the corner suite covers reality, what experience is worth, why a chip missed its prediction. Each belief is held because someone experienced said so. Faradaem's studies put them to measurement, one at a time, with every simulation counted and written to the ledger.

The atlas charts what a circuit can be made to do: a grid over two spec axes, the same design search at every point, and the measured frontier between "met, here is the sizing" and "not found within budget". It never says impossible. The adversary replaces the signoff checkmark with a budgeted attack across corners, supply, temperature and mismatch; a design that holds earns "survived N adversarial simulations", and N is the strength of the claim. Forensics runs the simulator backwards, searching for the condition that reproduces an observed set of numbers, and proves itself on blind trials whose answer it was never told. The learning curve prices experience: every spec is solved cold and again warm from the ledger's accumulated attempts, and the difference is reported in simulations. And the arena opens the four-way comparison's rules to any method that can be written as a function, budgeted and scored where it cannot cheat.

Roadmap

[x]V0.0resistor divider via ngspice
[x]V0.1RC circuit + AC sweep + Bode plot
[x]V0.2SKY130 MOSFET simulates
[x]V0.3auto-measurement of gain/BW/PM/power
[x]V0.4hand-designed two-stage op-amp
[x]V0.5parameterized netlist
[x]V0.6numerical optimizer hits spec
[x]V0.7LLM layer with tool calling
[x]V0.8topology selection
[x]V0.9PVT + Monte Carlo
[x]V1.0spec in, verified schematic out
[x]V1.2slew rate and settling, measured on a real step
[x]V1.3swing, common-mode range, CMRR and PSRR
[x]V1.4a third topology: folded cascode
[x]V1.5floorplan area, GDS output, five rules checked, and the specs measured again under its own interconnect
[x]V1.6the drawn geometry is checked against the PDK rather than assumed
[x]V1.7the p-channel devices are drawn in an n-well, and the well is checked
[x]V1.8the nets are routed, so the interconnect is measured off drawn metal
[x]V1.9a real device stack, two metal layers, taps, the folded cascode, the drawing checked against the netlist, and the foundry's own runset run over the result
[x]V1.10the compensation network drawn, layout versus schematic by KLayout's engine, and the wires priced in ohms
[x]V1.11matched pairs drawn common centroid with dummies and guard rings, the loop closed on the drawn circuit, and the four-way comparison the plan asks for
[x]V1.12the workbench around the numbers: the self-writing datasheet, pinned numbers, compare, blame, the corner autopsy, the tapeout packet, the notebook, and the doctor
[x]V1.13the studies: the capability atlas, signoff as a budgeted attack, forensics that run the simulator backwards, warm starts priced against cold ones, and the arena's open rules
[x]V1.14the toolchain installs itself in one command, and the published site stops pretending to be the tool: explicit deployments, a real notebook and 404, validated imports, remembered designs, and every number counted from the code
[x]V1.15the model library is cut to the two devices the tool draws, proved to give the same numbers, and a simulation that took sixteen seconds takes half of one
[x]V1.16the published site is the tool: ngspice and Faradaem's own code as WebAssembly in the page, every circuit measured including the SKY130 amplifiers, and the amplifiers drawn, rule-checked and written to GDS there too, all proved against a native run; locally it is an application, in its own window, from the Start menu; the strategist runs there too, behind one endpoint that holds the key, with the browser as its hands; and the wiring is extracted off the drawn polygons, coupling between nets and resistance in the deck, proved against KLayout and against the capacitor it was drawn to be
[ ]V2.0a second circuit family, and silicon through Tiny Tapeout

Colophon

Built with the Python standard library, vanilla JavaScript and ngspice. No frameworks, no build step, no remote assets. See the changelog.

Who built it

Tommy Liu has been building and taking apart electronics since middle school. His work spans analog design and digital signal processing, most recently a low-cost, high-precision digital oscilloscope that EDN named one of its 20 most-read articles of 2025. He is also drawn to the mathematics and physics underneath the hardware, having qualified for the USA Mathematical Olympiad and earned distinction in the USA Physics Olympiad. He is currently studying Electrical Engineering and Computer Science at the University of Illinois Urbana-Champaign, where Kirchhoff was his first software project and Faradaem is his second.

Find him on LinkedIn and X. Source and progress live at https://github.com/tommysl8/faradaem.